EoSens Creation Camera Series

EoSens Creation Series of FPGA programmable-ready smart cameras are designed for multi-camera industrial automation systems. The series enables engineers to embed their own custom IP into a Mikrotron 2-megapixel 10GigE GenICam-compliant camera that has the power to externally stream 10-bit pixel resolution images at 535 fps or internally stream 8-bit images at 2,240 fps. EoSens Creation cameras also offer sensitivity of 20V/Lux @ 550 nm to achieve high-contrast, detailed images in low-light environments. In addition, the camera's SFP+ connection works with both copper and fiber interfaces, making it possible to install long cable runs using low-cost Ethernet cabling, switches, and network interfaces.

Offering an open, scalable framework, the cameras feature an XiLINX Kintex Ultrascale FPGA plus an additional onboard 2GB DDRD of memory for edge functions such as defect pixel correction, gamma correction, dynamic range correction, and noise reduction. By reducing the linear data flow to the host PC's CPU and therefore supplying additional bandwidth, this design eliminates bottlenecks, accelerates image pre-processing, and unlocks the full potential of the 2MP sensor's resolution and frame rate. This type of architecture is highly suitable in IIoT projects where the goals are to improve operational efficiency and inspection accuracy, increase production speed, and reduce the total cost of system ownership. 

By using XiLINX Vivado Design Suite software the integrator can easily customize FPGA controls, processing, diagnostics, and resource analysis to accelerate time-to-market. An open platform concept provides a clear separation between the basic camera functions and the application IP to ensure a straightforward development environment.

• Functionality of a high-speed camera
• Output of image data from max. resolution to ROI up to the performance limit of the interface
• GenICam compliant
• Firmware update in the field
• Fanless, optionally with fan
• Open platform concept with clear separation between the basic camera function and application IP
• Powerful, fast Xilinx FPGA with additional external memory
• Higher image and data rates can be used up to the performance limit of the sensor
• IP Protection concept for encryption of customer and application-specific programming
• Programming via Xilinx development software
• Development kit with JTAG interface available